Samsung extends its “package process organization” to semiconductors

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Samsung Electronics has implemented a new semiconductor package process organization. This is a strategy to gain competitiveness in the post-processing industry that they have lagged behind TSMC.

According to the Samsung Elctronics business report, they have established a “Test and Conditioning (TP) Center” within the administration of the Global Manufacturing & Infrastructure department of the DS sector. The Global Manufacturing & Infrastructure department manages all semiconductor manufacturing processes such as equipment, gas, chemicals, electronics and also safe environment. The existing organization (TSP) consisted of △ Memory Manufacturing Technology Center △ Foundry Manufacturing Technology Center △ Infrastructure Technology Center △ Environmental Safety Center.

TP Center is organized with nine executives, including Vice President Kyu-yeol Lee (the head of TP Center) and Vice President Ki-hwan Choi. Many of them are TSP. In fact, it almost amounts to transferring the TP center within TSP to the Global Manufacturing & Infrastructure department. The existing general TSP will focus on technology development for “package development”.

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The transfer of the TP center is a springboard for the expansion of infrastructure investments, such as the construction of global facilities. Where the Memory·Foundry·System LSI division focuses on technology development, the Global Manufacturing & Infrastructure department is at the heart of the manufacturing system·semiconductor fab (fab) production facilities. At the end of last year, Samsung Electronics reorganized its management structure, and the proportion of the Global Manufacturing & Infrastructure department increased significantly. Many executives were also promoted from the department.

While the memory, foundry, and LSI system divisions focus on technology development, the key to the Global Manufacturing & Infrastructure department is the establishment and operation of manufacturing and production facilities such as semiconductor fabs ( fabs). The Global Manufacturing & Infrastructure department is where Samsung Electronics revamped its organization late last year, and the proportion has increased significantly. Many executives were also promoted from the general manager.

The TP Center is expected to become the spearhead for competition in semiconductor packages and testing. Recently, packages and testing have become the key feature that determines the competitiveness of a semiconductor. TSMC and Intel are also investing in new semiconductor packaging technologies such as heterodyne. TSMC is establishing a new semiconductor package factory in Taiwan and an R&D center in Japan. Intel is also investing US$7 billion (about KRW 8.631 billion) and EUR 8 billion (about KRW 10.850 billion) in Malaysia and Italy to build a package factory, respectively.

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It looks like Samsung is also beefing up its packaging capabilities. In 2015, they lost an application processor (AP) supply order for the iPhone from Apple to TSMC with a fan-out-wafer level package (FO-WLP), and took it as a huge lesson. At the end of 2018, the existing TP center was upgraded to create a TSP general manager who integrated packaging manufacturing and research. In 2019, they purchased the Panel Level Package (PLP) business, which is a next-generation packaging technology, from Samsung Electro-Mechanics for KRW 785 billion. They are advancing their packaging technology such as WLP.

According to Gartner forecasts, the semiconductor market is expected to grow from USD 48.8 billion (KRW 60.18 trillion) in 2020 to USD 64.9 billion (KRW 80 trillion) in 2025.

By reporter Dong-jun Kwon ([email protected])